蚂蚁S9矿板引脚定义

发布时间:2026/7/23 19:19:44
蚂蚁S9矿板引脚定义 设备树 bitmain-antminer-s9.dtsPCB引脚定义ENPLUGRSTTXDRXDSCLSDAJ9MIO36R16R17T17R18N17P18J8MIO35Y18Y19V16W16W18W19J7MIO34T20U20V20W20W18W19J6MIO33U14U15U18U19W18W19J5MIO32T16U17V15W15W18W19J4MIO31Y16Y17W14Y14W18W19J3MIO30T14T15P14R14W18W19J2MIO29R19V13V12W13W18W19J1MIO28T11T10T12U12W18W19S1MIO47D3_REDMIO37FAN1F19S2MIO51D3_GREENMIO38FAN2F20D2MIO15FAN3G17D5M19FAN4G18D6M17FAN5J20(AD5P)D7F16FAN6H20(AD5N)D8L19FAN_PWMJ18(AD4P)顶层引脚/** PL_FAN_SPEED[4]--FAN_SPEED5---系统时钟 PL_FAN_SPEED[0]--FAN_SPEED1--- 按键 **/ module PL_TOP( input i_clk, input i_rst_n, input [5:0] PL_FAN_SPEED, output [8:0] PL_J_PLUG, output [8:0] PL_J_RST, output [8:0] PL_J_TXD, output [8:0] PL_J_RXD, output [1:0] PL_J_SCL, output [1:0] PL_J_SDA, output PL_FAN_PWM, output PL_D5, output PL_D6, output PL_D7, output PL_D8 ); assign PL_J_PLUG {8{1b1}}; assign PL_J_RST {8{1b1}}; assign PL_J_TXD {8{1b1}}; assign PL_J_RXD {8{1b1}}; assign PL_J_SCL {0,0}; assign PL_J_SDA {0,0}; assign PL_D5 PL_FAN_SPEED[0]; assign PL_D6 PL_FAN_SPEED[4]; assign PL_D7 1; assign PL_D8 1; endmodulesystem.xdcset_property -dict {PACKAGE_PIN T10 IOSTANDARD LVCMOS33} [get_ports {PL_J_RST[0]}] set_property -dict {PACKAGE_PIN V13 IOSTANDARD LVCMOS33} [get_ports {PL_J_RST[1]}] set_property -dict {PACKAGE_PIN T15 IOSTANDARD LVCMOS33} [get_ports {PL_J_RST[2]}] set_property -dict {PACKAGE_PIN Y17 IOSTANDARD LVCMOS33} [get_ports {PL_J_RST[3]}] set_property -dict {PACKAGE_PIN U17 IOSTANDARD LVCMOS33} [get_ports {PL_J_RST[4]}] set_property -dict {PACKAGE_PIN U15 IOSTANDARD LVCMOS33} [get_ports {PL_J_RST[5]}] set_property -dict {PACKAGE_PIN U20 IOSTANDARD LVCMOS33} [get_ports {PL_J_RST[6]}] set_property -dict {PACKAGE_PIN Y19 IOSTANDARD LVCMOS33} [get_ports {PL_J_RST[7]}] set_property -dict {PACKAGE_PIN R17 IOSTANDARD LVCMOS33} [get_ports {PL_J_RST[8]}] set_property -dict {PACKAGE_PIN T11 IOSTANDARD LVCMOS33} [get_ports {PL_J_PLUG[0]}] set_property -dict {PACKAGE_PIN R19 IOSTANDARD LVCMOS33} [get_ports {PL_J_PLUG[1]}] set_property -dict {PACKAGE_PIN T14 IOSTANDARD LVCMOS33} [get_ports {PL_J_PLUG[2]}] set_property -dict {PACKAGE_PIN Y16 IOSTANDARD LVCMOS33} [get_ports {PL_J_PLUG[3]}] set_property -dict {PACKAGE_PIN T16 IOSTANDARD LVCMOS33} [get_ports {PL_J_PLUG[4]}] set_property -dict {PACKAGE_PIN U14 IOSTANDARD LVCMOS33} [get_ports {PL_J_PLUG[5]}] set_property -dict {PACKAGE_PIN T20 IOSTANDARD LVCMOS33} [get_ports {PL_J_PLUG[6]}] set_property -dict {PACKAGE_PIN Y18 IOSTANDARD LVCMOS33} [get_ports {PL_J_PLUG[7]}] set_property -dict {PACKAGE_PIN R16 IOSTANDARD LVCMOS33} [get_ports {PL_J_PLUG[8]}] set_property -dict {PACKAGE_PIN U12 IOSTANDARD LVCMOS33} [get_ports {PL_J_RXD[0]}] set_property -dict {PACKAGE_PIN W13 IOSTANDARD LVCMOS33} [get_ports {PL_J_RXD[1]}] set_property -dict {PACKAGE_PIN R14 IOSTANDARD LVCMOS33} [get_ports {PL_J_RXD[2]}] set_property -dict {PACKAGE_PIN Y14 IOSTANDARD LVCMOS33} [get_ports {PL_J_RXD[3]}] set_property -dict {PACKAGE_PIN W15 IOSTANDARD LVCMOS33} [get_ports {PL_J_RXD[4]}] set_property -dict {PACKAGE_PIN U19 IOSTANDARD LVCMOS33} [get_ports {PL_J_RXD[5]}] set_property -dict {PACKAGE_PIN W20 IOSTANDARD LVCMOS33} [get_ports {PL_J_RXD[6]}] set_property -dict {PACKAGE_PIN W16 IOSTANDARD LVCMOS33} [get_ports {PL_J_RXD[7]}] set_property -dict {PACKAGE_PIN R18 IOSTANDARD LVCMOS33} [get_ports {PL_J_RXD[8]}] set_property -dict {PACKAGE_PIN T12 IOSTANDARD LVCMOS33} [get_ports {PL_J_TXD[0]}] set_property -dict {PACKAGE_PIN V12 IOSTANDARD LVCMOS33} [get_ports {PL_J_TXD[1]}] set_property -dict {PACKAGE_PIN P14 IOSTANDARD LVCMOS33} [get_ports {PL_J_TXD[2]}] set_property -dict {PACKAGE_PIN W14 IOSTANDARD LVCMOS33} [get_ports {PL_J_TXD[3]}] set_property -dict {PACKAGE_PIN V15 IOSTANDARD LVCMOS33} [get_ports {PL_J_TXD[4]}] set_property -dict {PACKAGE_PIN U18 IOSTANDARD LVCMOS33} [get_ports {PL_J_TXD[5]}] set_property -dict {PACKAGE_PIN V20 IOSTANDARD LVCMOS33} [get_ports {PL_J_TXD[6]}] set_property -dict {PACKAGE_PIN V16 IOSTANDARD LVCMOS33} [get_ports {PL_J_TXD[7]}] set_property -dict {PACKAGE_PIN T17 IOSTANDARD LVCMOS33} [get_ports {PL_J_TXD[8]}] set_property -dict {PACKAGE_PIN W18 IOSTANDARD LVCMOS33} [get_ports {PL_J_SCL[0]}] set_property -dict {PACKAGE_PIN W19 IOSTANDARD LVCMOS33} [get_ports {PL_J_SDA[0]}] set_property -dict {PACKAGE_PIN N17 IOSTANDARD LVCMOS33} [get_ports {PL_J_SCL[1]}] set_property -dict {PACKAGE_PIN P18 IOSTANDARD LVCMOS33} [get_ports {PL_J_SDA[1]}] set_property -dict {PACKAGE_PIN M19 IOSTANDARD LVCMOS33} [get_ports PL_D5] set_property -dict {PACKAGE_PIN M17 IOSTANDARD LVCMOS33} [get_ports PL_D6] set_property -dict {PACKAGE_PIN F16 IOSTANDARD LVCMOS33} [get_ports PL_D7] set_property -dict {PACKAGE_PIN L19 IOSTANDARD LVCMOS33} [get_ports PL_D8] set_property -dict {PACKAGE_PIN F19 IOSTANDARD LVCMOS33} [get_ports {PL_FAN_SPEED[0]}] set_property -dict {PACKAGE_PIN F20 IOSTANDARD LVCMOS33} [get_ports {PL_FAN_SPEED[1]}] set_property -dict {PACKAGE_PIN G17 IOSTANDARD LVCMOS33} [get_ports {PL_FAN_SPEED[2]}] set_property -dict {PACKAGE_PIN G18 IOSTANDARD LVCMOS33} [get_ports {PL_FAN_SPEED[3]}] set_property -dict {PACKAGE_PIN J20 IOSTANDARD LVCMOS33} [get_ports {PL_FAN_SPEED[4]}] set_property -dict {PACKAGE_PIN H20 IOSTANDARD LVCMOS33} [get_ports {PL_FAN_SPEED[5]}] set_property -dict {PACKAGE_PIN J18 IOSTANDARD LVCMOS33} [get_ports PL_FAN_PWM]