前端个人网站模板,国内最新新闻摘抄30字,企业网页建设公司费用怎么收,百度搜索什么关键词能搜到网站创建正点原子的TF-A工作区#xff0c;目的是想查看正点原子的设备树文件“stm32mp157d-atk.dts”和设备树头文件“stm32mp157d-atk.dtsi”#xff0c;了解设备树是什么样子#xff0c;为后期基于“ST公司的源码”创建自己的设备树提供参考#xff0c;同时也是为了学习移植u…创建正点原子的TF-A工作区目的是想查看正点原子的设备树文件“stm32mp157d-atk.dts”和设备树头文件“stm32mp157d-atk.dtsi”了解设备树是什么样子为后期基于“ST公司的源码”创建自己的设备树提供参考同时也是为了学习移植uboot。 1、在Ubuntu桌面找到Visual Studio Code在图标上右击鼠标点击“打开”见下图 得到下图 2、点击“文件”再点击“打开文件夹”见下图 3、点击下图中的“其他位置” 4、点击“计算机”-à“home” -à“zgq”-à“linux”-à“atk_mp1”-à“alientek_tf-a” 见下图 5、点击 “确定” 6、将“欢迎使用”关闭再点击“文件”点击“将工作区另存为…”见下图操作 得到下图 7、输入“tf-a”再点击“保存” 得到下图 8、点击“tf-a-stm32mp-2.2.r1”得到下图 9、点击“fdts”,然后点击“stm32mp157d-atk.dts”查看设备树文件见下图 “stm32mp157d-atk.dts”内容如下 // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) /* * Copyright (C) STMicroelectronics 2019 - All Rights Reserved * Author: Alexandre Torgue alexandre.torguest.com for STMicroelectronics. */ /dts-v1/; #include stm32mp157.dtsi #include stm32mp15xd.dtsi #include stm32mp15-pinctrl.dtsi #include stm32mp15xxaa-pinctrl.dtsi #include stm32mp157d-atk.dtsi #include dt-bindings/soc/st,stm32-etzpc.h / { model STMicroelectronics STM32MP157D eval daughter; compatible st,stm32mp157d-atk, st,stm32mp157; chosen { stdout-path serial0:115200n8; }; aliases { serial0 uart4; }; }; cpu1 { cpu-supply vddcore; }; etzpc { st,decprot DECPROT(STM32MP1_ETZPC_USART1_ID,DECPROT_NS_RW,DECPROT_UNLOCK) DECPROT(STM32MP1_ETZPC_SPI6_ID, DECPROT_NS_RW, DECPROT_UNLOCK) DECPROT(STM32MP1_ETZPC_I2C4_ID, DECPROT_NS_RW, DECPROT_UNLOCK) DECPROT(STM32MP1_ETZPC_I2C6_ID, DECPROT_NS_RW, DECPROT_UNLOCK) DECPROT(STM32MP1_ETZPC_RNG1_ID, DECPROT_NS_RW, DECPROT_UNLOCK) DECPROT(STM32MP1_ETZPC_HASH1_ID, DECPROT_NS_RW, DECPROT_UNLOCK) DECPROT(STM32MP1_ETZPC_DDRCTRL_ID, DECPROT_S_RW, DECPROT_LOCK) DECPROT(STM32MP1_ETZPC_DDRPHYC_ID, DECPROT_S_RW, DECPROT_LOCK) DECPROT(STM32MP1_ETZPC_STGENC_ID, DECPROT_S_RW, DECPROT_LOCK) DECPROT(STM32MP1_ETZPC_BKPSRAM_ID, DECPROT_S_RW, DECPROT_LOCK) DECPROT(STM32MP1_ETZPC_IWDG1_ID, DECPROT_S_RW, DECPROT_LOCK) ; }; 10、点击“fdts”,然后点击“stm32mp157d-atk.dtsi”查看设备树头文件见下图 “stm32mp157d-atk.dtsi”内容如下 // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause) /* * Copyright (C) STMicroelectronics 2017 - All Rights Reserved * Author: Ludovic Barre ludovic.barrest.com for STMicroelectronics. */ #include dt-bindings/clock/stm32mp1-clksrc.h #include dt-bindings/power/stm32mp1-power.h #include stm32mp15-ddr3-2x4Gb-1066-binG.dtsi / { memoryc0000000 { device_type memory; reg 0xC0000000 0x40000000; }; vddcore: regulator-vddcore { compatible regulator-fixed; regulator-name vddcore; regulator-min-microvolt 1200000; regulator-max-microvolt 1350000; regulator-off-in-suspend; regulator-always-on; }; vdd_ddr: regulator-vdd-ddr { compatible regulator-fixed; regulator-name vdd_ddr; regulator-min-microvolt 1350000; regulator-max-microvolt 1350000; regulator-off-in-suspend; regulator-always-on; }; vdda: regulator-vvdda { compatible regulator-fixed; regulator-name vdda; regulator-min-microvolt 2900000; regulator-max-microvolt 2900000; regulator-off-in-suspend; regulator-always-on; }; vtt_ddr: regulator-vtt-ddr { compatible regulator-fixed; regulator-name vtt_ddr; regulator-min-microvolt 500000; regulator-max-microvolt 750000; regulator-off-in-suspend; regulator-always-on; }; v3v3: regulator-3p3v { compatible regulator-fixed; regulator-name v3v3; regulator-min-microvolt 3300000; regulator-max-microvolt 3300000; regulator-off-in-suspend; regulator-always-on; }; v1v8_audio: regulator-v1v8-audio { compatible regulator-fixed; regulator-name v1v8_audio; regulator-min-microvolt 1800000; regulator-max-microvolt 1800000; regulator-off-in-suspend; regulator-always-on; }; v3v3_hdmi: regulator-v3v3-hdmi { compatible regulator-fixed; regulator-name v3v3_hdmi; regulator-min-microvolt 3300000; regulator-max-microvolt 3300000; regulator-off-in-suspend; regulator-always-on; }; v1v2_hdmi: regulator-v1v2-hdmi { compatible regulator-fixed; regulator-name v1v2_hdmi; regulator-min-microvolt 1200000; regulator-max-microvolt 1200000; regulator-off-in-suspend; regulator-always-on; }; vdd: regulator-vdd { compatible regulator-fixed; regulator-name vdd; regulator-min-microvolt 3300000; regulator-max-microvolt 3300000; regulator-off-in-suspend; regulator-always-on; }; vdd_usb: regulator-vdd-usb { compatible regulator-fixed; regulator-name vdd_usb; regulator-min-microvolt 3300000; regulator-max-microvolt 3300000; regulator-off-in-suspend; regulator-always-on; }; v2v8: regulator-v2v8 { compatible regulator-fixed; regulator-name v2v8; regulator-min-microvolt 2800000; regulator-max-microvolt 2800000; regulator-off-in-suspend; regulator-always-on; }; }; bsec { board_id: board_idec { reg 0xec 0x4; st,non-secure-otp; }; }; clk_hse { st,digbypass; }; cpu0{ cpu-supply vddcore; }; hash1 { status okay; }; iwdg2 { timeout-sec 32; status okay; secure-status okay; }; nvmem_layout { nvmem-cells cfg0_otp, part_number_otp, monotonic_otp, nand_otp, uid_otp, package_otp, hw2_otp, pkh_otp, board_id; nvmem-cell-names cfg0_otp, part_number_otp, monotonic_otp, nand_otp, uid_otp, package_otp, hw2_otp, pkh_otp, board_id; }; pwr_regulators { system_suspend_supported_soc_modes STM32_PM_CSLEEP_RUN STM32_PM_CSTOP_ALLOW_LP_STOP STM32_PM_CSTOP_ALLOW_LPLV_STOP STM32_PM_CSTOP_ALLOW_STANDBY_DDR_SR ; system_off_soc_mode STM32_PM_CSTOP_ALLOW_STANDBY_DDR_OFF; vdd-supply vdd; vdd_3v3_usbfs-supply vdd_usb; }; rcc { st,hsi-cal; st,csi-cal; st,cal-sec 60; st,clksrc CLK_MPU_PLL1P CLK_AXI_PLL2P CLK_MCU_PLL3P CLK_PLL12_HSE CLK_PLL3_HSE CLK_PLL4_HSE CLK_RTC_LSE CLK_MCO1_DISABLED CLK_MCO2_DISABLED ; st,clkdiv 1 /*MPU*/ 0 /*AXI*/ 0 /*MCU*/ 1 /*APB1*/ 1 /*APB2*/ 1 /*APB3*/ 1 /*APB4*/ 2 /*APB5*/ 23 /*RTC*/ 0 /*MCO1*/ 0 /*MCO2*/ ; st,pkcs CLK_CKPER_HSE CLK_FMC_ACLK CLK_QSPI_ACLK CLK_ETH_DISABLED CLK_SDMMC12_PLL4P CLK_DSI_DSIPLL CLK_STGEN_HSE CLK_USBPHY_HSE CLK_SPI2S1_PLL3Q CLK_SPI2S23_PLL3Q CLK_SPI45_HSI CLK_SPI6_HSI CLK_I2C46_HSI CLK_SDMMC3_PLL4P CLK_USBO_USBPHY CLK_ADC_CKPER CLK_CEC_LSE CLK_I2C12_HSI CLK_I2C35_HSI CLK_UART1_HSI CLK_UART24_HSI CLK_UART35_HSI CLK_UART6_HSI CLK_UART78_HSI CLK_SPDIF_PLL4P CLK_FDCAN_PLL4R CLK_SAI1_PLL3Q CLK_SAI2_PLL3Q CLK_SAI3_PLL3Q CLK_SAI4_PLL3Q CLK_RNG1_LSI CLK_RNG2_LSI CLK_LPTIM1_PCLK1 CLK_LPTIM23_PCLK3 CLK_LPTIM45_LSE ; /* VCO 1066.0 MHz P 266 (AXI), Q 533 (GPU), R 533 (DDR) */ pll2: st,pll1 { compatible st,stm32mp1-pll; reg 1; cfg 2 65 1 0 0 PQR(1,1,1); frac 0x1400; }; /* VCO 417.8 MHz P 209, Q 24, R 11 */ pll3: st,pll2 { compatible st,stm32mp1-pll; reg 2; cfg 1 33 1 16 36 PQR(1,1,1); frac 0x1a04; }; /* VCO 594.0 MHz P 99, Q 74, R 74 */ pll4: st,pll3 { compatible st,stm32mp1-pll; reg 3; cfg 3 98 5 7 7 PQR(1,1,1); }; }; sdmmc1 { pinctrl-names default; pinctrl-0 sdmmc1_b4_pins_a sdmmc1_dir_pins_a; st,neg-edge; broken-cd; bus-width 4; vmmc-supply v3v3; status okay; }; sdmmc2 { pinctrl-names default; pinctrl-0 sdmmc2_b4_pins_a sdmmc2_d47_pins_a; non-removable; st,neg-edge; bus-width 8; vmmc-supply v3v3; vqmmc-supply v3v3; status okay; }; uart4 { pinctrl-names default; pinctrl-0 uart4_pins_a; status okay; }; usbotg_hs { phys usbphyc_port1 0; phy-names usb2-phy; usb-role-switch; status okay; }; usbphyc { status okay; }; usbphyc_port0 { phy-supply vdd_usb; }; usbphyc_port1 { phy-supply vdd_usb; };